CS 3220 - Processor Design (2024)

Course Description

This is an intermediate-level course that follows CS 2200.It is a project-based course in which you will learn the principlesin pipelined processor design by actually implementing a fully functonal (but simple) pipelined processor using an FPGA (Field-Programmable Gate Array) board, together with a simple application that will run on this processor. In addition to learning about processor design, you will also learn abot the interacton between architecture (hardware functionality) and code generation (how machine-language programs can be produced for that architecture).

Prerequisites

CS 2200 - We will assume that you have taken CS 2200 or an equivalent course, as well as its prerequisites (i.e. 2110). In particular, we will assume that you understand the basics of digital logic (e.g. how to put together a 1-bit adder using AND, OR, and NOT logic gates) and of computer organization (e.g. how single-cycle, multi-cycle, and pipelined pocessors can be put together using of adders, registers, wires, multiplexers, etc.).

Instructor

Milos Prvulovic (Mee-losh Purr-voo-loh-vich)

Office: KACB 2332

Office hours:Mondays3:00pm-4:00pm, Tuesdays 1:30pm-2:30pm.

Textbook, Software, and Required FPGA Boards

There is no required textbook in this class, but you will need to purchase your own Altera DE1 board. With the academic discount, these boards cost $125, and they can be purchased directly from Altera

Be careful to purchase the correct board (DE-1), and to follow their instructions on how to get the academic discount.

Instead of a textbook, we will use a combination of class notes and online resources. These online resources include free software that will translate and load your hardware designs into the FPGA board. To run this software and connect to the FPGA board, you will need access to aWindows-based computer with a USB port.

Attendance Policy

Attending lectures and taking good notes will be very important,, especially because 1) there is no texbook, 2)important announcements (e.g. about project requirements or changes in due dates) will be made in some lectures,and 3) some things you will need to know for the project cannot be adequately explained only via lecture slides, so they will be shown (demonstrated) in lectures.

To encourage attendance, there will be two unannounced (surprise) pop-quizzes during the semester, in addition to in-class demos and the mid-term exam that appear in the schedule. In summary, we will not be taking attendance in every lecture, but it will be very, very hard to earn a passing grade without attending lectures.

Grading

The grade for this course will be based on the following:

Weight Comment
Project assignment 1 5% Grade is assigned based on the report.
Project assignment 2 10% Grade is assigned based on the report.
Project assignment 3 15% Grade is assigned based on the report.
Project assignment 4 15% Grade is assigned based on both the demo and the report.
Project assignment 5 15% Grade is assigned based on both the demo and the report.
Midterm exam 10% In-class, will be graded before drop-day
Final exam 20% Comprehnsive (covers entire semester)
Pop-Quizzes 10% Two unannounced in-class quizzes, each weighted 5% of the final grade

I plan to use two policies to assign final (letter) grades.Each student's grade will be comupted using both policies, and the actual final grade will be thebetter of the tw grades.The first policy is not curved, with 90% or more of the maximum possible score yielding an A, 80%-90% yielding a B, 70%-90% yielding a C, 60%-70% yielding a D, and <60% yielding an F. The second policy is the traditional curve-based policy, using the average (AVG) and standard deviation (STD) of scores in the class. Earning more than AVG+STD (one standard deviation above the average) will yeald an A, earning AVG to AVG+STD points will yield a B, earning AVG-STD to AVG points will yield a C, earning AVG-2*STD to AVG-STD points will yield aD, and earning fewer than AVG-2*STD (two standard deviations or more below the class average) will result in an F grade. Because this second policy is curve-based, the only way to be certain you will get a particular grade is to earn it according to the first policy.

There will be no make-up assignments, so if you need a particular grade plan to perform accordingly on homework, projects, and exams. Because of the large number of assignments in this class, exam re-gradescan only be requestedduring 14 days that follow the release of scores from that assignment/exam. The exception to this is the final project assignment and the final exam.Forassignment 6,re-grades can only be requested until the Wednesday of the finals week. For the final exam, no re-gradeswill be possible until final grades are officially released (in OSCAR). You can still see your final exam and request a regrade during the first two weeks of classes in the Fall semester. When requesting a re-grade, keep in mind that the entire submitted assignment or exam will be regraded, so a regrade may result in a loss ofpoints.

The grade in this clas will be based solely on demonstrated performance. Once an assignmentor exam is over and graded, the only way the score on that assignment or exam will be changed is if a legitimate mistake in grading has been made. No grade will ever be changed because the student needs a better grade to stay in the program, to keep a fellowship, to get a job, or any other reason. If you believe you need some particular grade in this class, the only way to get that grade is to earn it through homework, projects, and exams.

No deficiency exam

Ifyou are a gradating senior, keep in mind that this is a project-based class for the purposes of GT Rules and Regulations section7.B.3. More specifically, a graduating senior who has a single-course deficiencyusually has a right to be permitted a re-examination, and passing that re-examination would allow the student to graduate. However, this right to a re-examinaton does not apply to CS 3220 or any other "courses in which a significant portion of the grade is based upon projects". Please keep this in mind if you are planning to graduate this semester.

Policy for Late Assignment Submission

The policy is very simple:

T-Square will not accept late assignments, and we will ONLY grade what you submit in T-Square.

All homeworks an projects are due on the day specified by the problem set or announced in T-Square or in class (later announcements take precedence over prior ones). No late assignmentswill be accepted and no credit will be given for any late submission. An assignment is only considered submitted when it issubmitted throughT-square, and the files that will be graded will be those submitted in T-Square. So please make surethat the files you submitted in T-Square are indeed the ones you want graded.We will notaccept a late submission if the file iselsewhere, even ifthe filemodification time and dateare before the deadline (those can be forged).

Students who face emergency situations outside their contol that prevent them from completing an assignent in time should contact the professor before the assigment is due or, if that is impossible,as soon aspossible. After receiving an extension, the student must submit the assignment before the extended deadlne and will berequired to provide documentation or other proof of the emergency situaton.

Note that needs, wants, and emergencies within the student's controldo not qualify for an extensions. In particular, the student is responsible for keeping adequate backups of their work and submitting the assignmentsahead of time if needed. Examples of what does not qualify for an extension include (but are not lmited to): the student needs a particular grade to graduate, the student wants to go on a cruise with their extended family, the student goes spelunking when the assignment is due and the cave does not have WiFi, the student tries to submit the assignment froma coffee shop and WiFi is down,the student misreads the date when the assignment is due, pet rhinoceros ate student's laptop, laptop fell out during a bungee-jump, etc.

Collaboration Policy

Examor Pop-Quiz

Absolutely no collaboration is allowed.Copying or receiving anyinformationfrom another person or from another person'sexam, with or without their consent, is unethical and unacceptable. The only exception to this are the TAs and the professor, whom you can ask for clarification of an exam question during the exam. Cheating on exam is a direct violation of the GT Academic Honor Code and will be dealt with accordingly.

Project Assignments

Project assignments will be done in groups of two, but each student is to write their report and demo their porject individually. Absolutely no collaboration is allowed between students in different groups. Collaboration with students or other persons outside your group (for example, a friend at another institution) is prohibited, and will be reported as Unauthorized Collaboration, which is a violation of the Academic Honor Code. Submitting any work other than your own (including content from the Internet) without proper attribution (specifying the source) will also be reported as Plagiarism (which is alsoa violation of the Academic Honor Code). Note that this is different from discussing lecture material (such as re-explaining an idea covered in class in a different manner or with a new example, or discussing what is being asked in the project assignment). Helping someone understand what is being asked in a problem is OK, but giving them hints or helping them actually do what is being asked is not OK.

Collaboration within the group is allowed only for the implementation part or the project assignmment, i.e. for writing Verilog code, programming the board, collecting required files, etc. However, each student in the group is responsible for individually writing up ad submitting a report and all the required files in T-Square, without any help from other members of their group. Workin with or copying fromanyone (including your group partner) on writing the project report will be reported as Unauthorized Collaboration and/or Plagiarism.

Note that each student's grade will be based on what that particular student submits in T-Square. For example, if a group completes an assignment but one student in that group submits the wrong (e.g. old) files, the two students will have very different scores on that assignment. a cnsequence of this is that the students in each group are allowed (but not encouraged) to complete the project independently (if they want to do that and if they figure out how to share the board).

Also note that each student will demo their project individually, and that each student is responsible for understanding all aspects of the work they submitted (regardless of whether the student or their group partner did the work). Note that a student's score on Assignmnet 5 and 6 will be significantly reduced if the student cannot demo the work or explain how the imlementation or the code works.

Ambiguities, Clarifications, Questions?

If you're unsure about anything, ask the professor and/or consult the Academic Honor Code at www.honor.gatech.edu. A violation of the ruleswill still be treated asa violation of the ruls, regardless of whether you understood the rules or interpreted them correctly - if you are not sure that you understand how te rules apply to a particular situation, you should ask.

Tentative Schedule

Week Date Topics Notes
1 8/22 Introduction
8/24 Preassessment Test
8/26 Review: Number Representation, Boolean logic Registration ends at 4pm
2 8/29 Basic Verilog
8/31 FPGA Board and Tools Demo
9/2 Verilog "always" blocks Student group requests due
3 9/5 Official School Holiday - Labor Day
9/7 Initialization, Clocks, and PLLs
9/9 PLLs, Clocks, and Always Blocks
4 9/12 Memory in Verilog, Debugging Demo
9/14 Project ISA and Assembler
9/16 Project ISA and Assembler Assignment 1 Released
5 9/19 Project ISA and Assembler
9/21 Multi-Cycle Processor Implementation
9/23 Single-Cycle Processor Implementation
6 9/26 Basic Pipeline (No Stalls or Forwarding)
9/28 Midterm Review Assignment 1 Due, Assignment 2 Released
9/30 Midterm Exam
7 10/3 Hazards and Stalling
10/5 Forwarding
10/7 Understanding Critical Paths
8 10/10 Performance Optimization Demo
10/12 Branch Prediction Assignment 2 Due, Assignment 3 Released
10/14 Exceptions Last Day to Drop Class with "W" Grade.
9 10/17 Fall Recess
10/19 Exception Handling
10/21 Protected Mode Support
10 10/24 Timers
10/26 I/O Devices
10/28 Interrupts Assignment 3 Due, Assignment 4 Released
11 10/31 Optimizing Pipeline Stage
11/2 Optimizing ALUs and Multiplexers
11/4 Caching and Performance
12 11/7 Basic OS Support - System Calls
11/9 Basic OS Support - Multiprograming
11/11 Basic OS Support - Context Switching
13 11/14 Assignment 4 Demos Assignment 4 Due, Assignment 5 Released
11/16 Assignment 4 Demos
11/18 Cache Hierarchies
14 11/21 Support for Paging and Virtual Memory
11/23 Beyond Pipelining - Multi-Core
11/25 Official School Holiday - Thanksgiving
15 11/28 Beyond Pipelining - Instruction Scheduling
11/30 Beyond Pipelining - Power and Temperature
12/2 Beyond Pipelining - Reliability and Security Assignment 5 Due
16 12/5 Assignment 5 Demos
12/7 Assignment 5 Demos
12/9 Final Exam Review
12/16/2011 (Fri) Final exam 2:50pm - 5:40pm
CS 3220 - Processor Design (2024)

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